The Memory Hierarchy: Sizes, Latencies, Cycles to Time and Why Locality Matters
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Lessons in this course
- The Memory Hierarchy: Sizes, Latencies, Cycles to Time and Why Locality Matters Pro
- Address Bits: Offset, Index and Tag from Cache Size, Block Size and Ways Pro
- A Direct-Mapped Cache on a Trace: Last Use of a Set, Stored Tag, Hit or Miss Pro
- Hit Rate and Miss Types: Compulsory vs Conflict Misses and the Best You Could Reach Pro
- 2-Way Set-Associative with LRU: Two Ways per Set, Last-Use Times and the Victim Pro
- Average Memory Access Time: Hit Time, Miss Rate, Miss Penalty and a Second Level Pro
- Write Policies: Write-Through vs Write-Back Traffic, Dirty Blocks and the Final Flush Pro
- Comparing Cache Designs: Size × Block Size, Miss Penalty, AMAT per Design and a Chart Pro