Digital Logic by Hand: Gates, Truth Tables, Karnaugh Maps, Binary Adders, Multiplexers & Decoders, Flip-Flops, Counters, Shift Registers & State Machines
Build a tiny computer's logic out of 0s and 1s. You will write gates as cell formulas, simplify functions with Karnaugh maps and prove the result on every row, add binary numbers with half and full adders, route signals through multiplexers and decoders, clock flip-flops row by row, count and shift bits, step a small state machine and find the fastest clock its timing allows, with every cell checked as you go.
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About this course
This course builds a toy computer's logic out of 0s and 1s. You write AND, OR, NAND, NOR and XOR as formulas and wire an XOR from NAND gates only, turn a truth table into a sum of products and simplify a 4-input function with a Karnaugh map and a don't-care cell. You split numbers into bits with MOD and INT, add them in a 4-bit ripple-carry adder with an overflow flag, build a decoder, a multiplexer, a display decoder and a parity bit, step SR, D, JK and T flip-flops on clock edges, run counters and a shift register with a pattern detector and finish with a traffic-light state machine and its fastest clock.
Lessons
- Gates as Formulas: AND, OR, NOT, NAND, NOR, XOR & an XOR Built Only from NANDs Pro
- From Truth Table to Expression: Minterms, Sum of Products & a Check Column Pro
- Karnaugh Maps: Gray-Code Layout, Groups of 1, 2, 4 & 8, Don't-Care Cells and the Literals You Save Pro
- Binary Adders: Bits with MOD and INT, Half & Full Adders, a 4-Bit Ripple-Carry Adder and the Overflow Flag Pro
- Multiplexers & Decoders: Select Bits, One-Hot Lines, a Display Decoder from a Lookup Table and a Parity Bit Pro
- Latches & Flip-Flops: SR Latch with an Invalid Flag, D, JK and T Flip-Flops on Rising Clock Edges Pro
- Counters & Shift Registers: a 3-Bit Synchronous Counter, a Mod-6 Counter with Reset and a Pattern Detector Pro
- Capstone – A Traffic-Light State Machine: State Table, Combined Keys, 24 Clock Ticks and the Fastest Clock Pro